Method for producing semiconductor epitaxial wafer and semiconductor epitaxial wafer

ABSTRACT

A method for producing a semiconductor epitaxial wafer, including steps of: fabricating an epitaxial wafer by epitaxially growing a semiconductor layer on a silicon-based substrate; observing the outer edge portion of the fabricated epitaxial wafer; and removing portions in which a crack, epitaxial layer peeling, and a reaction mark observed in the step of observing are present. As a result, a method for producing a semiconductor epitaxial wafer in which a completely crack-free semiconductor epitaxial wafer can be obtained, is provided.

This is a Divisional of application Ser. No. 15/121,177 filed Aug. 24,2016, which is a National Stage Application of PCT/JP2015/000597 filedFeb. 10, 2015, which claims the benefit of Japanese Application No.2014-042815 (filed Mar. 5, 2014. The entire disclosures of the priorapplications are hereby incorporated by reference herein their entirety.

BACKGROUND OF THE INVENTION 1. Field of the Invention

The present invention relates to a method for producing a semiconductorepitaxial wafer having an epitaxial growth layer on a silicon-basedsubstrate and to a semiconductor epitaxial wafer.

2. Description of the Related Art

In order to produce a semiconductor epitaxial wafer, epitaxial growth isperformed on the front surface of a silicon-based substrate (forexample, a silicon substrate or a silicon carbide substrate) or the likeby using a commercially available epitaxial production apparatus,whereby a hetero-homo epitaxial wafer is produced.

In an epitaxial wafer having an epitaxial growth layer composed of anitride semiconductor, the epitaxial growth layer disposed on asilicon-based substrate, the film thickness of the epitaxial growthlayer increases on the outer edge portion and a crown (a projectionprotruding from the main surface of the growth layer) in the epitaxialgrowth layer appears.

Conditions such as the thickness of each layer of the epitaxial growthlayer are selected such that warpage of the silicon-based substrate andstress in the epitaxial growth layer are optimized in a central part ofa wafer which is used as a semiconductor device. As a result, if thecrown appears, the balance between the stress produced in the epitaxialgrowth layer and the warpage of the substrate is lost, which affects theepitaxial growth layer and causes hexagonal patterned cracks or the liketo appear in the epitaxial growth layer near the outer edge portion.

In order to prevent the appearance of such a crown, a method of, forexample, chamfering the outer edge portion of a silicon-based substrateand forming an epitaxial growth layer thereon is proposed (for example,Patent Literature 1).

Moreover, as measures against cracks, performing epitaxial growth afterroughening the surface near a Si substrate edge (Patent Literature 2),using, as a substrate for hetero epitaxial growth, a silicon substratewhose principal surface is the (111) plane having orientation flat in adirection obtained by rotating the <110> direction at an angle of 30°,90°, or 150° in a counterclockwise direction by using the <111>direction as a rotation axis (Patent Literature 3), performing epitaxialgrowth in a state in which the periphery portion of a silicon-basedsubstrate is covered with a ring (Patent Literature 4), and so forth areproposed.

Furthermore, in an epitaxial wafer having a GaN layer and an AlN layerepitaxially grown on a silicon substrate, if a crack appears at the edgeportion of the wafer during epitaxial growth, gas of TMA(trimethylaluminum) or TMG (trimethylgallium) which is the source gasenters through an opening of the crack and reacts with Si, whereby areaction mark appears.

As measures against such a reaction mark, growing a thick GaN filmepitaxially on a SOI substrate via a buffer film (an AlN film) isproposed (Patent Literature 5).

CITATION LIST Patent Literature

[Patent Literature 1] Japanese Unexamined Patent Publication (Kokai) No.59-227117

[Patent Literature 2] International Publication No. WO2011/161975

[Patent Literature 3] Japanese Unexamined Patent Publication (Kokai) No2011-165962

[Patent Literature 4] Japanese Unexamined Patent Publication (Kokai) No.2013-171898

[Patent Literature 5] Japanese Unexamined Patent Publication (Kokai) No.2007-246289

SUMMARY OF THE INVENTION

However, under the present circumstances, even in an epitaxial wafergenerally called “crack-free”, a crack is present in about a few-mmrange from the outer edge portion due to the appearance of a crown.

It is feared that this crack extends in a device production process anda production line is contaminated by inducing peeling of an epitaxialgrowth layer in a device production process. For this reason, acompletely crack-free epitaxial substrate is desired.

The present invention has been made in view of the problem, and apurpose thereof is to provide a method for producing a semiconductorepitaxial wafer in which a completely crack-free semiconductor epitaxialwafer can be obtained.

To attain the above purpose, the present invention provides a method forproducing a semiconductor epitaxial wafer, including: fabricating anepitaxial wafer by epitaxially growing a semiconductor layer on asilicon-based substrate; observing the outer edge portion of thefabricated epitaxial wafer; and removing portions in which a crack,epitaxial layer peeling, and a reaction mark observed in the step ofobserving are present.

As described above, by observing the outer edge portion of thefabricated epitaxial wafer and removing the portions in which theobserved crack, epitaxial layer peeling, and reaction mark are present,it is possible to obtain a completely crack-free semiconductor epitaxialwafer easily and suppress contamination of a production line caused as aresult of a crack extending or causing peeling of an epitaxial growthlayer in a subsequent process such as a device production process.

At this time, it is preferable that, in the step of removing, theportions in which the crack, the epitaxial layer peeling, and thereaction mark are present are ground without change in the outerdiameter of the silicon-based substrate of the epitaxial wafer.

As described above, by grinding the portions in which the crack, theepitaxial layer peeling, and the reaction mark are present withoutchanging the outer diameter of the silicon-based substrate of theepitaxial wafer, there is no need to give consideration to a change inthe diameter of the epitaxial wafer in a subsequent process, whereby itis possible to use the same apparatus and jig corresponding to thediameter of a yet-to-be-ground silicon-based substrate.

At this time, it is preferable that, after the step of removing, aground surface of the epitaxial wafer is turned into a mirror surface ora quasi-mirror surface by mixed acid etching.

As described above, by turning the ground surface of the epitaxial waferinto a mirror surface or a quasi-mirror surface by mixed acid etching,it is possible to suppress particle generation from the ground portion.

At this time, it is preferable that an overhang portion of the epitaxiallayer, the overhang portion formed as a result of the silicon-basedsubstrate being etched by the mixed acid etching, is removed bychamfering.

As described above, by removing the overhang portion of the epitaxiallayer by chamfering, it is possible to prevent the overhang portion frombeing chipped in a subsequent process.

At this time, it is possible to adopt a configuration in which thesemiconductor layer is composed of a nitride semiconductor.

As a semiconductor layer to be epitaxially grown, the nitridesemiconductor can be suitably used.

At this time, the nitride semiconductor may be one or more than one ofAlN, GaN, InN, and a mixed crystal thereof.

As a nitride semiconductor that is used in a semiconductor layer to beepitaxially grown, the materials can be suitably used.

Moreover, the present invention provides a semiconductor epitaxial waferin which a semiconductor layer is epitaxially grown on a silicon-basedsubstrate, wherein, at the outer edge portion of the semiconductorepitaxial wafer, at least part of the semiconductor layer is removed.

As described above, as a result of at least part of the epitaxiallygrown semiconductor layer being removed on the outer edge portion of thesemiconductor epitaxial wafer, it is possible to remove the portions inwhich a crack, epitaxial layer peeling, and a reaction mark which appearon the outer edge portion of the semiconductor epitaxial wafer arepresent, which makes it possible to obtain a completely crack-freesemiconductor epitaxial wafer easily and obtain a semiconductorepitaxial wafer that does not cause extending of the crack andcontamination of a production line caused by inducing peeling of anepitaxial growth layer in a subsequent process such as a deviceproduction process.

At this time, it is preferable that surface of the region in which atleast part of the semiconductor layer is removed, is a mirror surface ora quasi-mirror surface.

With such a configuration, it is possible to suppress particlegeneration from the removal portion.

At this time, it is possible to adopt a configuration in which, in aregion where at least part of the semiconductor layer is removed, thesilicon-based substrate is exposed.

Such a configuration can ensure more reliable removal of the portions inwhich the crack, the epitaxial layer peeling, and the reaction markwhich appear on the outer edge portion of the semiconductor epitaxialwafer are present.

At this time, it is possible to adopt a configuration in which thesemiconductor layer is composed of a nitride semiconductor.

In an epitaxial wafer of a nitride semiconductor, a crack, epitaxiallayer peeling, and a reaction mark appear on the periphery portionthereof without exception; therefore, the present invention isparticularly useful when a semiconductor layer which is epitaxiallygrown is a nitride semiconductor.

At this time, the nitride semiconductor may be one or more than one ofAlN, GaN, InN, and a mixed crystal thereof.

When the present invention is applied to a semiconductor epitaxial waferusing the above materials as a nitride semiconductor that is used in asemiconductor layer to be epitaxially grown, it is possible to obtain acompletely crack-free semiconductor epitaxial wafer more effectively.

As described above, according to the present invention, it is possibleto obtain a completely crack-free semiconductor epitaxial wafer easilyand suppress extending of the crack and contamination of a productionline caused by inducing peeling of an epitaxial growth layer in asubsequent process such as a device production process.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a diagram depicting an example of a production flow of amethod for producing a semiconductor epitaxial wafer according to thepresent invention;

FIG. 2 (a) is a photograph of the ground semiconductor epitaxial waferwhen the semiconductor epitaxial wafer is viewed from diagonally above,FIG. 2 (b) is a sectional view of the periphery portion of the groundsemiconductor epitaxial wafer, and FIG. 2(c) and FIG. 2(d) are enlargedphotographs of an area near the border between an epitaxial layerportion and a terrace chamfered portion on the periphery portion of theground semiconductor epitaxial wafer;

FIG. 3 is a diagram depicting a crack and a reaction mark observed onthe periphery portion of a semiconductor epitaxial wafer of ComparativeExample; and

FIG. 4 is a diagram depicting an overhang portion of an epitaxial layer,the overhang portion being formed in a production process of the methodfor producing a semiconductor epitaxial wafer according to the presentinvention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Hereinafter, the present invention will be described in detail as anexample of an embodiment with reference to the drawings, but the presentinvention is not restricted thereto.

As mentioned earlier, under the present circumstances, even in anepitaxial wafer called “crack-free”, a crack is present in about afew-mm range from the outer edge due to the appearance of a crown, andit is feared that this crack extends in a device production process anda production line is contaminated by inducing peeling of an epitaxialgrowth layer in a device production process. For this reason, acompletely crack-free epitaxial substrate is desired.

Thus, the present inventors have earnestly studied a method forproducing a semiconductor epitaxial wafer which can obtain a completelycrack-free semiconductor epitaxial wafer easily and suppress extendingof the crack and contamination of a production line caused by inducingpeeling of an epitaxial growth layer in a subsequent process such as adevice production process.

As a result, the present inventors have found that, by observing theouter edge portion of a fabricated epitaxial wafer and removing theportions in which the observed crack, epitaxial layer peeling, andreaction mark are present, it is possible to obtain a completelycrack-free semiconductor epitaxial wafer easily and suppress extendingof the crack and contamination of a production line caused by inducingpeeling of an epitaxial growth layer in a subsequent process such as adevice production process, thereby bringing the present invention tocompletion.

Hereinafter, with reference to FIG. 1, the method for producing asemiconductor epitaxial wafer according to the present invention will beexplained.

First, as depicted in FIG. 1(a), a silicon-based substrate is preparedand placed in an epitaxial growth furnace. The silicon-based substrateis, for example, a silicon (Si) substrate or a silicon carbide (SiC)substrate.

Next, as depicted in FIG. 1(b), by using an epitaxial growth method suchas metal-organic chemical vapor deposition (MOCVD), an epitaxial growthlayer is formed on the silicon-based substrate set at a temperaturehigher than or equal to 900° C., for example, at 1200° C.

The composition of this epitaxial layer is not limited to a particularcomposition; the epitaxial layer may be composed of a nitridesemiconductor and this nitride semiconductor may be one or more than oneof AlN, GaN, InN, and a mixed crystal thereof. For example, it ispossible to, after forming an AlN layer, grow a buffer layer formed ofalternately stacked AlGaN layers and GaN layers, and form a GaN layer onthe surface thereof, and growth is performed such that the resultantlayer has a thickness of about 3 to 10 μm as a whole.

Next, as depicted in FIG. 1(c), the epitaxial wafer outer edge portionis observed to check the presence or absence of a crack, a reactionmark, and epitaxial layer peeling and the location where the crack, thereaction mark, or the epitaxial layer peeling appeared. The observationmethod is not limited to a particular method; for example, it ispossible to make visual observations of a crack and a reaction markunder collimated light and observe film peeling and a reaction markunder a microscope.

Next, as depicted in FIG. 1(d), the portion where the crack appeared,the portion where the reaction mark appeared, and the portion where thepeeling of epitaxial layer appeared are removed by grinding.

At this time, it is preferable to grind the portions in which the crack,the epitaxial layer peeling, and the reaction mark are present withoutchanging the outer diameter of the silicon-based substrate of theepitaxial wafer.

As described above, by grinding the portions in which the crack, theepitaxial layer peeling, and the reaction mark are present withoutchanging the outer diameter of the silicon-based substrate of theepitaxial wafer, there is no need to give consideration to a change inthe diameter of the epitaxial wafer in a subsequent process, whereby itis possible to use the same apparatus and jig corresponding to thediameter of a yet-to-be-ground silicon-based substrate.

Here, it is possible to perform grinding by using a commerciallyavailable grinding wheel such that outer edge portion of the wafer isground in the width range of 1 to 15 mm to a depth which is deeper thanthe thickness of the epitaxial layer by about 1 to 250 μm.

In this case, the ground surface obtained after the epitaxial layer iscompletely removed is in a state in which the silicon-based substrate isexposed; however, it is necessary simply to eliminate defects such ascracks and the like, and complete removal of the epitaxial layer is notnecessarily required.

Moreover, the removal method is not limited to grinding and etching orpolishing may be used.

Next, as depicted in FIG. 1(e), the ground surface of the outer edgeportion is etched by using, for example, a mixed acid to turn it into amirror surface or a quasi-mirror surface. As described above, by turningthe ground surface into a mirror surface or a quasi-mirror surface byetching, it is possible to suppress particle generation from the groundportion.

Incidentally, when a grinding wheel whose grit size is fine is used,etching does not necessarily have to be performed because surfaceroughness of the ground surface is reduced.

Moreover, the ground surface may be turned into a mirror surface byusing CMP (chemical mechanical polishing).

Next, as depicted in FIG. 1(f), an overhang portion (refer to FIG. 4) onthe outer edge portion of the epitaxial layer, the overhang portionbeing formed by etching, is removed by chamfering. As described above,by removing the overhang portion, it is possible to prevent the overhangportion from being chipped in a subsequent process.

By producing a semiconductor epitaxial wafer in accordance with theproduction flow depicted in FIG. 1, it is possible to obtain acompletely crack-free semiconductor epitaxial wafer easily and suppressextending of the crack and contamination of a production line caused byinducing peeling of an epitaxial growth layer in a subsequent processsuch as a device production process.

Next, a semiconductor epitaxial wafer according to the present inventionwill be explained.

The semiconductor epitaxial wafer according to the present invention isa semiconductor epitaxial wafer having a semiconductor layer epitaxiallygrown on a silicon-based substrate, wherein at least part of thesemiconductor layer is removed at the outer edge portion of thesemiconductor epitaxial wafer.

As a result of at least part of the epitaxially grown semiconductorlayer being removed at the outer edge portion of the semiconductorepitaxial wafer, it is possible to remove the portions in which thecrack, the epitaxial layer peeling, and the reaction mark which appearon the outer edge portion of the semiconductor epitaxial wafer arepresent, which makes it possible to obtain a completely crack-freesemiconductor epitaxial wafer easily and suppress extending of the crackand contamination of a production line caused by inducing peeling of anepitaxial growth layer in a subsequent process such as a deviceproduction process.

Moreover, it is preferable that surface of a region where at least partof the epitaxially grown semiconductor layer is removed, is a mirrorsurface or a quasi-mirror surface.

Such a configuration makes it possible to suppress particle generationform the removal portion.

Furthermore, it is possible to adopt a configuration in which, in aregion where at least part of the epitaxially grown semiconductor layeris removed, the silicon-based substrate is exposed.

Such a configuration ensures more reliable removal of the portions inwhich the crack, the epitaxial layer peeling, and the reaction markwhich appear on the outer edge portion of the semiconductor epitaxialwafer are present.

Moreover, it is possible to adopt a configuration in which theepitaxially grown semiconductor layer is composed of a nitridesemiconductor.

In an epitaxial wafer of a nitride semiconductor, a crack, epitaxiallayer peeling, and a reaction mark appear on the periphery portionthereof without exception; therefore, the present invention isparticularly useful when a semiconductor layer to be epitaxially grownis a nitride semiconductor.

This nitride semiconductor may be one or more than one of AlN, GaN, InN,and a mixed crystal thereof.

When the present invention is applied to a semiconductor epitaxial waferusing the above materials as a nitride semiconductor that is used in asemiconductor layer to be epitaxially grown, it is possible to obtain acompletely crack-free semiconductor epitaxial wafer more effectively.

EXAMPLES

Hereinafter, the present invention will be described more specificallywith Example and Comparative Example, but the present invention is notrestricted to these examples.

Comparative Example

After an AlN layer was formed on a silicon substrate of 150 mm diameterand 1 mm thickness by epitaxial growth, a buffer layer formed ofalternately stacked AlGaN layers and GaN layers was grown and a GaNlayer was formed on the surface thereof.

The total thickness of the epitaxial layer was 10 μm.

When the outer edge portion of this semiconductor epitaxial wafer wasobserved with collimated light, cracks were observed almost all aroundthe outer edge.

Moreover, epitaxial layer peelings were scattered all around the outeredge portion and reaction marks were sparsely scattered all around theouter edge portion.

In FIG. 3, the state of the crack and the reaction mark on the peripheryportion of the semiconductor epitaxial wafer fabricated in the mannerdescribed above is depicted.

Example

A semiconductor epitaxial wafer was fabricated in the same manner asComparative Example.

After the outer edge portion of the fabricated semiconductor epitaxialwafer was observed with collimated light, a crack portion, an epitaxiallayer peeling (epitaxial layer burr) portion, and a reaction markportion on outer edge portion of the semiconductor epitaxial wafer wereground (subjected to terrace chamfering) by a grinding wheel in an area10 mm wide and 50 μm deep.

The ground semiconductor epitaxial wafer is depicted in FIG. 2.

FIG. 2 (a) is a photograph of the ground semiconductor epitaxial waferwhen the semiconductor epitaxial wafer is viewed from diagonally above,FIG. 2 (b) is a sectional view of the periphery portion of the groundsemiconductor epitaxial wafer, and FIGS. 2(c) and 2(d) are enlargedphotographs of an area near the border between an epitaxial layerportion and a terrace chamfered portion on the periphery portion of theground semiconductor epitaxial wafer.

As is clear from FIG. 2, all the crack portions, epitaxial layer peeling(epitaxial layer burr) portions, and reaction mark portions on outeredge portion of the wafer are completely removed.

In addition, by performing mixed acid etching on the ground portion, theground portion was turned into a mirror surface or a quasi-mirrorsurface.

Then, an overhang portion of the epitaxial layer, the overhang portionbeing formed by the mixed acid etching, was removed by tape chamfering.

It is to be understood that the present invention is not limited in anyway by the embodiment thereof described above. The above embodiment ismerely an example, and anything that has substantially the samestructure as the technical idea recited in the claims of the presentinvention and that offers similar workings and benefits falls within thetechnical scope of the present invention.

1. A semiconductor epitaxial wafer in which a semiconductor layer is,epitaxially grown on a silicon-based substrate, wherein at an outer edgeportion of the semiconductor epitaxial wafer, at least part of thesemiconductor layer is removed.
 2. The semiconductor epitaxial waferaccording to claim 1, wherein surface of a region where at least part ofthe semiconductor layer is removed, is a mirror surface or aquasi-mirror surface.
 3. The semiconductor epitaxial wafer according toclaim 1, wherein in a region where at least part of the semiconductorlayer is removed, the silicon-based substrate is exposed.
 4. Thesemiconductor epitaxial wafer according to claim 2, wherein in a regionwhere at least part of the semiconductor layer is removed, thesilicon-based substrate is exposed.
 5. The semiconductor epitaxial waferaccording to claim 1, wherein the semiconductor layer is composed of anitride semiconductor.
 6. The semiconductor epitaxial wafer according toclaim 2, wherein the semiconductor layer is composed of a nitridesemiconductor.
 7. The semiconductor epitaxial wafer according to claim3, wherein the semiconductor layer is composed of a nitridesemiconductor.
 8. The semiconductor epitaxial wafer according to claim5, wherein the nitride semiconductor is one or more than one of AlN,GaN, InN, and a mixed crystal thereof.